Electrical and Computer Engineering 560L:
Digital System Design (4.0 units)
Hardware System Design and implementation, FPGAs, HDL design, timing, FIFOs, Cache, CAMs, SSRAMs, OoO/multi-threaded CPU design, cache coherency, clock-domain crossing, bus protocols. Prerequisite: EE 457.
- Prerequisite: EE 457
- Note: Register for one lecture and lab
| Section | Session | Type | Time | Days | Registered | Instructor | Location | Syllabus | Info |
|---|---|---|---|---|---|---|---|---|---|
| 30460D | 906 | Lecture | 2:00-4:30pm | Mon, Wed | 33 of 40 | Gandhi Puvvada | VHE217 | PDF (75002 KB) |    |
| 30462D | 906 | Lecture | 2:00-4:30pm | Tue, Thu | 30 of 45 | Gandhi Puvvada | OHE100C | PDF (75002 KB) | |
| 30464R | 906 | Lab | 6:00-8:50pm | Tuesday | 63 of 90 | GFS106 | |