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Electrical and Computer Engineering (EE)
- http://ee.usc.edu/
- D class assignments for undergraduates available in EEB102; Phone: (213) 740-4447.
- D class assignments for graduate students available in EEB100; Phone: (213) 740-4447.
- To be enrolled in an off-campus course, you MUST also be enrolled in the Distance Education Network. For more information, call 740-4488 or go to den.usc.edu. DEN courses are indicated by a location of OFF CAMPUS.
Network architectures; layered protocols, network service interface; local networks; long-haul networks; internal protocols; link protocols; addressing; routing; flow control; higher level protocols.
- Restriction: Registration closed to the following class level(s): Freshmen, Sophomore
| Section | Session | Type | Time | Days | Registered | Instructor | Location | Syllabus | Info |
|---|---|---|---|---|---|---|---|---|---|
| 30506D | 966 | Lecture | 10:00-12:05pm | Mon, Wed | 18 of 20 | Shahin Nazarian | DEN@Viterbi |  | |
| 30508R | 966 | Discussion | 1:00-1:50pm | Monday | 18 of 20 | DEN@Viterbi | | ||
| 30472R | 966 | Quiz | TBA | TBA | 18 of 20 | DEN@Viterbi | | ||
| 30502D | 056 | Lecture | 10:00-12:05pm | Mon, Wed | 27 of 20 | Shahin Nazarian | OHE136 | | |
| 30504R | 056 | Discussion | 1:00-1:50pm | Monday | 27 of 50 | OHE100C | | ||
| 30470R | 056 | Quiz | TBA | TBA | 27 of 50 | OFFICE | |
Intensive introduction to programming principles, discrete mathematics for computing, software design and software engineering concepts. Not available for credit to computer sciencemajors, graduate or undergraduate.
- Crosslist: This course is offered by the CSCI department but may qualify for major credit in EE. To register, enroll in CSCI 455.
| Section | Session | Type | Time | Days | Registered | Instructor | Location | Syllabus | Info |
|---|---|---|---|---|---|---|---|---|---|
| 29922D | 050 | Lecture | 1:10-3:15pm | MTuW | 56 of 70 | Sathyanaraya Raghavachary | OHE136 | | |
| 29923R | 050 | Lab | 1:10-3:15pm | Thursday | 56 of 70 | OHE136 | | ||
| 29924D | 162 | Lecture | 1:10-3:15pm | MTuW | 4 of 15 | Sathyanaraya Raghavachary | DEN@Viterbi | | |
| 29925R | 162 | Lab | 1:10-3:15pm | Thursday | 4 of 15 | DEN@Viterbi | |
Register Transfer level machine organization; performance; arithmetic; pipelined processors; exceptions, out-of-order and speculative execution, cache, virtual memory, multi-core multi-threaded processors, cache coherence.
- Prerequisite: EE 354
| Section | Session | Type | Time | Days | Registered | Instructor | Location | Syllabus | Info |
|---|---|---|---|---|---|---|---|---|---|
| 30422D | 925 | Lecture | 1:30-4:40pm | Tue, Thu | 4 of 20 | Mark Redekopp | DEN@Viterbi | | |
| 30425R | 925 | Discussion | 1:00-2:50pm | Friday | 4 of 20 | DEN@Viterbi | | ||
| 30592R | 925 | Quiz | TBA | TBA | 4 of 20 | DEN@Viterbi | | ||
| 30420D | 055 | Lecture | 1:30-4:40pm | Tue, Thu | 16 of 30 | Mark Redekopp | RTH217 | | |
| 30421R | 055 | Discussion | 1:00-2:50pm | Friday | 16 of 30 | OHE120 | | ||
| 30423R | 055 | Quiz | TBA | TBA | 16 of 30 | OFFICE | |
Individual research and readings. Not available for graduate credit.
- Restriction: Registration open to the following class level(s): Junior, Senior
| Section | Session | Units | Type | Time | Days | Registered | Instructor | Location | Syllabus | Info |
|---|---|---|---|---|---|---|---|---|---|---|
| 30445D | 059 | 1.0-4.0 | Lecture | TBA | TBA | 0 of 10 | Richard Leahy,Tony Levi,Edward Maby, Keith Chugg | OFFICE | |
Laboratory oriented with lectures keyed to practical procedures and processes. Solid-state fabrication and analysis fundamentals; basic device construction techniques. Prerequisite: BSEE
- Restriction: Registration open to the following class level(s): Master Student, Doctoral Student
- Note: Register for lecture and one lab
| Section | Session | Type | Time | Days | Registered | Instructor | Location | Syllabus | Info |
|---|---|---|---|---|---|---|---|---|---|
| 30435D | 906 | Lecture | 6:30-8:25pm | Mon, Wed | 17 of 18 | Kian Kaviani | VHE217 |   | |
| 30429R | 906 | Lab | 2:00-5:00pm | Monday | 6 of 6 | VHE102 | | ||
| 30436R | 906 | Lab | 5:00-8:00pm | Tuesday | 6 of 6 | VHE102 | | ||
| 30437R | 906 | Lab | 2:00-5:00pm | Friday | 5 of 6 | VHE102 | |
Complete systematic tape-out flow including schematic design, simulation, layout, and post-layout verification of analog, mixed-signal, or radio-frequency integrated circuits. Prerequisite: EE 536a.
- Prerequisite: EE 536a
| Section | Session | Type | Time | Days | Registered | Instructor | Location | Syllabus | Info |
|---|---|---|---|---|---|---|---|---|---|
| 30468D | 908 | Lecture | 5:00-6:35pm | Mon, Wed | Canceled | |
Distribution free classification, discriminant functions, training algorithms; statistical classification, parametric and nonparametric techniques; artificial neural networks.
| Section | Session | Type | Time | Days | Registered | Instructor | Location | Syllabus | Info |
|---|---|---|---|---|---|---|---|---|---|
| 30589D | 911 | Lecture | 4:00-5:55pm | Mon, Wed | 0 of 20 | Mohammad Reza Rajati | DEN@Viterbi | PDF (200342 KB) | |
| 30590R | 911 | Discussion | 2:00-2:50pm | Friday | 0 of 20 | OHE132 | | ||
| 30585D | 906 | Lecture | 4:00-5:55pm | Mon, Wed | 46 of 80 | Mohammad Reza Rajati | OHE132 | PDF (200342 KB) | |
| 30587R | 906 | Discussion | 2:00-2:50pm | Friday | 46 of 80 | OHE132 | |
Hardware System Design and implementation, FPGAs, HDL design, timing, FIFOs, Cache, CAMs, SSRAMs, OoO/multi-threaded CPU design, cache coherency, clock-domain crossing, bus protocols. Prerequisite: EE 457.
- Prerequisite: EE 457
- Note: Register for one lecture and lab
| Section | Session | Type | Time | Days | Registered | Instructor | Location | Syllabus | Info |
|---|---|---|---|---|---|---|---|---|---|
| 30460D | 906 | Lecture | 2:00-4:30pm | Mon, Wed | 33 of 40 | Gandhi Puvvada | VHE217 | PDF (75002 KB) | |
| 30462D | 906 | Lecture | 2:00-4:30pm | Tue, Thu | 30 of 45 | Gandhi Puvvada | OHE100C | PDF (75002 KB) | |
| 30464R | 906 | Lab | 6:00-8:50pm | Tuesday | 63 of 90 | GFS106 | |
Functional/timing/power verification of complex systems. Simulation-based, formal/semi-formal/assertion languages and tools (SystemVerilog, UVM, UPF, etc.) FPGA prototyping, hardware acceleration, statistical modeling and machine learning. Instructor permission required.
| Section | Session | Type | Time | Days | Registered | Instructor | Location | Syllabus | Info |
|---|---|---|---|---|---|---|---|---|---|
| 30578D | 906 | Lecture | 2:00-5:00pm | Mon, Wed | Canceled | PDF (58272 KB) | | ||
| 30579R | 906 | Discussion | 2:00-5:00pm | Tuesday | Canceled | | |||
| 30580R | 906 | Quiz | 2:00-5:00pm | Friday | Canceled | |
Research leading to the master's degree. Maximum units which may be applied to the degree to be determined by the department. Graded CR/NC.
| Section | Session | Units | Type | Time | Days | Registered | Instructor | Location | Syllabus | Info |
|---|---|---|---|---|---|---|---|---|---|---|
| 30474D | 908 | 1.0-6.0 | Lecture | TBA | TBA | 29 of 50 | Richard Leahy,Tony Levi,Edward Maby, Keith Chugg | OFFICE | |
Credit on acceptance of Thesis. Graded CR/NC.
- Restriction: Registration open to the following class level(s): Master Student
| Section | Session | Type | Time | Days | Registered | Instructor | Location | Syllabus | Info |
|---|---|---|---|---|---|---|---|---|---|
| 30451D | 908 | Lecture | TBA | TBA | 0 of 20 | OFFICE | |
Research leading to the doctorate. Maximum units which may be applied to the degree to be determined by the department. Graded CR/NC.
| Section | Session | Units | Type | Time | Days | Registered | Instructor | Location | Syllabus | Info |
|---|---|---|---|---|---|---|---|---|---|---|
| 30454D | 908 | 1.0-6.0 | Lecture | TBA | TBA | 45 of 100 | Richard Leahy,Tony Levi,Edward Maby, Keith Chugg | OFFICE | |
Credit on acceptance of Dissertation. Graded CR/NC.
- Restriction: Registration open to the following class level(s): Doctoral Student
| Section | Session | Type | Time | Days | Registered | Instructor | Location | Syllabus | Info |
|---|---|---|---|---|---|---|---|---|---|
| 30455D | 908 | Lecture | TBA | TBA | 12 of 30 | OFFICE | |