Electrical and Computer Engineering 577b:
VLSI System Design (4.0 units)
Semi-custom ASIC VLSI design flow; RTL coding, logic synthesis, automatic placement & routing, memory and interface design, signal integrity solutions, hardware acceleration and approximation
- Prerequisite: EE 577A
| Section | Session | Type | Time | Days | Registered | Instructor | Location | Syllabus | Info |
|---|---|---|---|---|---|---|---|---|---|
| 30653D | 034 | Lecture | 8:00-10:50am | Saturday | 1 of 5 | Moe Tabar | DEN@Viterbi |  | |
| 30487D | 034 | Discussion | 2:00-3:50pm | Friday | 1 of 5 | DEN@Viterbi | | ||
| 30656D | 048 | Lecture | 8:00-10:50am | Saturday | 54 of 55 | Moe Tabar | OHE132 | | |
| 30846R | 048 | Discussion | 2:00-3:50pm | Friday | 54 of 55 | Moe Tabar | OHE100D | |