Electrical Engineering 560L:

Digital System Design (4.0 units)

Hardware System Design and implementation, FPGAs, HDL design, timing, FIFOs, Cache, CAMs, SSRAMs, OoO/multi-threaded CPU design, cache coherency, clock-domain crossing, bus protocols. Prerequisite: EE 457.
  • Prerequisite: EE 457
  • Note: Register for one lecture and lab
SectionSessionTypeTimeDaysRegisteredInstructorLocationSyllabusInfo
30460D906Lecture2:00-4:30pmMon, Wed34 of 40Gandhi PuvvadaVHE217notefeesession dates
30462D906Lecture2:00-4:30pmTue, Thu34 of 40Gandhi PuvvadaOHE100Bfeesession dates
30464R906Lab6:00-8:50pmTuesday68 of 80KAP160session dates
Information accurate as of February 15, 2019 2:46 pm.
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