Electrical Engineering 201L:
Introduction to Digital Circuits (4.0 units)
Digital system design and implementation; synchronous design of datapath and control; schematic/Verilog-based design, simulation, and implementation in Field Programmable Gate Arrays; timing analysis; simple CPU design; semester-end project. Prerequisite: EE-101.
- Prerequisite: EE 101
- Note: Register for one lecture, lab and quiz
| Section | Session | Type | Time | Days | Registered | Instructor | Location | Syllabus | Info |
|---|---|---|---|---|---|---|---|---|---|
| 30416D | 001 | Lecture | 9:30-10:50am | Tue, Thu | 59 of 66 | Gandhi Puvvada | MHP105 |    | |
| 30420D | 001 | Lecture | 10:30-11:50am | Mon, Wed | 46 of 52 | Gandhi Puvvada | RTH105 | | |
| 30978R | 001 | Discussion | TBA | TBA | 17 of 20 | OFFICE | | ||
| 30440R | 001 | Quiz | 4:00-6:00pm | Friday | 96 of 180 | TBA | | ||
| 30434D | 001 | Lab | 6:00-8:50pm | Monday | 20 of 21 | OHE336 | | ||
| 30436D | 001 | Lab | 5:00-7:50pm | Wednesday | 20 of 22 | OHE336 | | ||
| 30438R | 001 | Lab | 5:00-7:50pm | Tuesday | 14 of 18 | OHE336 | | ||
| 30966D | 001 | Lab | 9:00-11:50am | Friday | 14 of 19 | OHE336 | | ||
| 30976R | 001 | Lab | 5:00-7:50pm | Thursday | 18 of 18 | OHE336 | | ||
| 30979R | 001 | Lab | 1:00-3:50pm | Friday | 19 of 20 | OHE336 | |