Electrical Engineering 477L:
MOS VLSI Circuit Design (4.0 units)
Analysis and design of digital MOS VLSI circuits including area, delay and power minimization. Laboratory assignments including design, layout, extraction, simulation and automatic synthesis.
Section | Session | Type | Time | Days | Registered | Instructor | Location | Syllabus | Info |
---|---|---|---|---|---|---|---|---|---|
30551D | 001 | Lecture | 6:30-9:10pm | Wednesday | 54 of 56 | Ehsan Pakbaznia | GFS118 | ![]() ![]() ![]() | |
30591D | 001 | Lecture | 8:30-9:50am | Mon, Wed | 48 of 48 | Shahin Nazarian | SGM601 | PDF (78493 KB) | ![]() ![]() ![]() |
30592D | 001 | Lecture | 6:30-9:10pm | Monday | 45 of 50 | Ali Zadeh | KAP156 | PDF (155326 KB) | ![]() ![]() ![]() |
30593D | 001 | Lecture | 12:30-1:50pm | Mon, Wed | 58 of 50 | Shahin Nazarian | OHE136 | PDF (78493 KB) | ![]() ![]() ![]() |
30781R | 001 | Lecture | 9:30-10:50am | Tue, Thu | 41 of 60 | Maryam Soltan | THH114 | ![]() ![]() | |
30449R | 001 | Quiz | 6:30-8:20pm | Tuesday | 192 of 245 | OFFICE | ![]() | ||
30599D | 014 | Lecture | 12:30-1:50pm | Mon, Wed | 3 of 20 | Shahin Nazarian | DEN@Viterbi | PDF (78493 KB) | ![]() ![]() ![]() |
30601R | 014 | Lab | 5:00-6:20pm | Wednesday | 2 of 20 | Shahin Nazarian | DEN@Viterbi | ![]() | |
30590R | 001 | Lab | 1:00-2:50pm | Friday | 40 of 41 | Shahin Nazarian | RTH105 | ![]() | |
30594R | 001 | Lab | 8:00-9:50am | Friday | 38 of 50 | Maryam Soltan | OHE230 | ![]() | |
30595R | 001 | Lab | 10:00-11:50am | Friday | 32 of 48 | Shahin Nazarian | RTH109 | ![]() | |
30596R | 001 | Lab | 5:00-6:20pm | Wednesday | 45 of 48 | Shahin Nazarian | RTH115 | ![]() ![]() | |
30597R | 001 | Lab | 3:00-4:50pm | Wednesday | 37 of 39 | Ali Zadeh | SAL127 | ![]() | |
30598R | 001 | Lab | 1:00-2:50pm | Friday | 35 of 36 | SAL127 | ![]() | ||
30786R | 001 | Lab | TBA | TBA | 7 of 45 | OFFICE | ![]() | ||
30991R | 001 | Lab | 10:00-11:50am | Wednesday | 13 of 25 | SAL126 | ![]() |